Appeal No. 1997-2660 Page 2
Application No. 08/224,407
BACKGROUND
The invention at issue in this appeal enables built-in,
self-testing of a smart memory. A smart memory is a memory
that includes on-chip processing capabilities that allow for
implementation of a parallel processing system. The
performance of such a system depends on the reliability of its
components, particularly on the reliability of its smart
memories.
The invention enables a smart memory to perform a self-
test to detect its operability. Because the self-test is done
internally, it can be completed quickly so as not to degrade
the efficiency of a parallel processing system in which the
smart memory resides.
Claim 12, which is representative for our purposes,
follows:
12. A method of self-testing a smart memory
including a data RAM, a broadcast RAM, and a data
path which includes a plurality of processing
elements operable to perform specific functions,
comprising the steps of:
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