Appeal No. 1997-2846
Application 08/388,599
20 have been allowed . Claims 14 through 17 have been2
withdrawn from consideration as being directed to a non
elected invention. Claims 9 and 13 have been canceled.
Appellants’ invention relates to an insulated gate
semiconductor device having a trench gate. In particular,
looking at Figure 1, the semiconductor device 151 includes a
first semiconductor layer 204, a second semiconductor layer
205, and a third semiconductor layer 206. Trenches 207 are
arranged substantially in a striped form along the upper
surface and formed from the upper surface to the first
semiconductor layer 204. Each trench 207 includes a gate
insulating film 209 and a gate electrode 210. The second
semiconductor layer 205 and the third semiconductor layer 206
are selectively exposed in the upper main surface interposed
between adjacent trenches 207. Looking at Figure 11, a
maximum distance Lmax is shown. Lmax is determined by the
formula Vpn > m x Jpr x D x Lmax, where Vpn is a built-in
pn
potential peculiar to a function portion of the second
semiconductor layer 205 and the third semiconductor layer 206,
Note the Advisory Action, Paper No. 14, mailed June 4, 1996.2
2
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 Next
Last modified: November 3, 2007