Ex parte TAKAHASHI et al. - Page 4




          Appeal No. 1997-2846                                                        
          Application 08/388,599                                                      



               a third semiconductor layer of the first conductivity                  
          type selectively formed in an upper surface portion of the                  
          second semiconductor layer,                                                 
               said semiconductor base body having a plurality of                     
          trenches arranged substantially in a stripe form along said                 
          upper main surface and formed from said upper main surface to               
          said first semiconductor layer,                                             
               said trench having a gate insulating film formed covering              
          its inner wall and a gate electrode buried in said trench with              
          the gate insulating film interposed therebetween,                           
               said second semiconductor layer and said third                         
          semiconductor layer being selectivity exposed in said upper                 
          main surface interposed between adjacent said trenches,                     
               said insulated gate semiconductor device further                       
          comprising,                                                                 
               a first main electrode electrically connected to both of               
          said second and third semiconductor layers on said upper main               
          surface and insulated from said gate electrode,                             
               a second main electrode electrically connected to said                 
          lower main surface, and                                                     
               overcurrent protection means for limiting the magnitude                
          of main current flowing between said first main electrode and               
          said second main electrode so as not to exceed a predetermined              
          limit current value, and                                                    
               shape of said third semiconductor layer being set so that              
          a maximum distance Lmax defined as a distance to a point which              
          is farthest from an exposure surface of said second                         
          semiconductor layer in said upper main surface among points on              
          an intersection of a boundary plane of said third                           
          semiconductor layer and said second semiconductor layer and                 
          said trench is given by Vpn > m x Jpr x P x Lmax for built-in               
                                                   pn                                 
          potential Vpn peculiar to a junction                                        
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