Ex parte GRUETZNER et al. - Page 8

          Appeal No. 1997-3129                                                        
          Application No. 08/301,743                                                  

          disclosure at page 6, lines 12-14 of the specification which                
                    In the example shown in Fig. 1 the selector 120                   
                    is integrated in chip 100 but the selector 120                    
                    may be a separate circuit component (emphasis                     
               As a final argument, Appellants contend (Brief, page 12)               
          that no teaching or suggestion exists in Sauerwald as to how                
          to implement interconnect test selection circuitry on a chip.               
          This is not surprising, however, since Sauerwald admittedly                 
          has no explicit disclosure of on-chip implementation of                     
          selection circuitry.  It is our view, however, that in view of              
          the availability of at least very-large-scale integration                   
          (VLSI) techniques at the time of filing of Appellants’                      
          application, Appellants’ arguments that the skilled artisan                 
          would not be able to incorporate selection circuitry on a                   
          single semiconductor chip strains credulity.                                
               In view of the above discussion, it is our opinion that                
          the Examiner has established a prima facie case of obviousness              
          which remains unrebuttted by any convincing arguments from                  
          Appellants.  Accordingly, the Examiner’s 35 U.S.C.  103                    
          rejection of independent claims 1, 11, 14, and 17 is                        

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