Appeal No. 1997-4426
Application No. 08/515,767
amendment after final rejection was filed on January 16, 1997
and was entered by the examiner.
The disclosed invention pertains to a dynamic type
semiconductor memory device, and more particularly, to a
circuit for controlling refresh operations of the memory cells
of such a memory device.
Representative claim 29 is reproduced as follows:
29. A dynamic type semiconductor memory device
including a plurality of memory cells each having a storage
data refreshed, comprising:
voltage level detecting circuitry coupled to receive a
power supply voltage and for detecting a level of the power
supply voltage and generating a refresh instruct signal in
accordance with the result of detection;
refresh request circuity [sic] including a refresh timer
for generating a refresh request signal at a predetermined
interval when activated, and coupled to receive said refresh
instruct signal for generating said refresh request signal
requesting refreshing of data of memory cells among said
plurality of memory cells when said refresh instruct signal is
active to instruct the refreshing;
control circuitry coupled to receive said refresh request
signal and responsive to the refresh instruct signal being
active for generating a control signal required for execution
of said refreshing; and
a logic gate circuit coupled to receive an external
control signal and said refresh instruct signal, for
selectively disabling an output of said voltage level
detecting circuitry and generating said refresh instruct
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