Appeal No. 1998-0368
Application No. 08/632,183
We take claim 1 first. Reviewing the record, we find
that the Examiner, in his rejection of the claim over Foster
‘570, Foster ‘654 and Mizukami [answer, pages 3 to 4] and his
response to Appellant's arguments [answer, pages 7 to 10], has
missed the claimed limitation of “means . . . for . . .
storing . . . an address . . ., the address being an access
address to the responding processor” (emphasis added). We
agree with Appellant that, in Foster ‘570 (even with Foster
‘654), “[t]here is no direct processor to processor data
transfer” [brief, page 4] (emphasis added). We note that
Foster ‘570 and Foster ‘654 both relate to the same system and
have a different architecture from Appellant's architecture.
The data do not flow directly among the various processors
(i.e., among the card processors and/or I/O processors or
across the card processors and I/O processors); instead, the
data flow through the local memories and the global memories
via the local and the global buses. Indeed, the main object
of the two Foster patents is to provide efficient bandwidth
utilization of the shared system (global bus 24 and global
memory 26) in this indirect data transfer among the
processors. See also Foster ‘570 at col. 5, lines 25 to 41.
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