Appeal No. 1998-0449
Application 08/578,900
an array of memory cells subdivided into at least first
and second memory banks;
bit lines and word lines electrically coupled to said
memory cells, respectively;
an address bus section for said first and second memory
banks;
first data transmission lines independently provided for
each of said memory banks;
column select lines for switching said bit lines of
memory cells to said first data transmission lines; and
column select signal latch circuits coupled to said
address bus section and said column select lines, and
respectively provided for each of said first and second memory
banks.
The examiner relies on the following reference:
Pinkham 4,683,555 July 28, 1987
Claims 15-28 stand rejected under 35 U.S.C. § 102(b)
as being anticipated by the disclosure of Pinkham.
Rather than repeat the arguments of appellant or the
examiner, we make reference to the briefs and the answer for
the respective details thereof.
OPINION
We have carefully considered the subject matter on
appeal, the rejection advanced by the examiner and the
evidence of anticipation relied upon by the examiner as
support for the rejection. We have, likewise, reviewed and
taken into consideration, in reaching our decision, the
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