Appeal No. 1998-0476
Application 08/397,157
see the switch to RAM mode at step 41 (thus monitor circuit
resetting is suppressed). At step 44 the monitor circuit is
refreshed. This refreshing is accomplished via a resetting
subroutine. This subroutine is shown in Figure 6. At step
50, the microcomputer is switched back to the ROM mode. We
note that the ROM mode allows the monitor circuit to be reset,
i.e., the signals are not
suppressed. This is the “switching the microcomputer from
time to time” recited in claim 7. Resetting of the monitor
circuit is accomplished at step 53, the microcomputer is
switched back to the RAM mode at step 54, and (back to Figure
5) after refresh step 44, the microcomputer is switched back
to ROM at step 47. At step 48, the microcomputer returns to
the main program, step 36 in Figure 4.
Thus, we find the claimed invention to have utility,
and we will not sustain the Examiner’s 35 U.S.C. § 101
rejection.
Rejection under 35 U.S.C. § 112
-5-
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 Next
Last modified: November 3, 2007