Appeal No. 1998-2661
Application 08/633,267
always has meant to connote that the execution unit
effectively "sees" a larger storage space
than is physically actually available for use. Hence, the
artisan would have clearly realized from Kau's prior art
logical registers that the number of virtual rename buffers of
claim 2 would have been larger in number than the actual
physical rename registers.
The discussion of pointers and lookup tables in the
above-noted paragraph at column 2 of Kau renders obvious the
subject matter of claim 3 on appeal.
As to claim 8, appellants' admitted prior art at pages 2
and 3 indicate that architected registers are known in the art
to be used with rename registers. Claim 8 does not define the
number of architected registers with respect to the number of
physical rename registers or the number of logical or virtual
registers. As to claim 12, both Kau and appellants' admitted
prior art indicate that plural execution units are known to be
a part of superscaler computer systems.
Turning to method independent claim 13, we apply this new
rejection for the reasoning set forth with respect to claims 1
through 3, 8 and 12. Claim 13 is broader in one respect than
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