Ex parte CHAN et al. - Page 13




          Appeal No. 1998-2661                                                        
          Application 08/633,267                                                      

          general purpose registers in this reference.  Indeed, both                  
          alternative uses of the buffer index 58 shown in Figures 4 and              
          5 and discussed at column 7 clearly indicate that the                       
          corresponding relationship between the intermediate storage                 
          buffers and the general purpose registers is done before the                
          result of a given instruction is obtained.                                  
               Kau is clearly in the same field of invention as                       
          appellants' disclosed and claimed invention because this                    
          reference deals with superscaler computer structure as                      
          indicated earlier.  Indeed, both also are concerned with                    
          instruction execution and sequencing operations of an                       
          instruction dispatcher and any bottlenecks associated                       
          therewith.  Because the intermediate storage buffers perform a              
          temporary storage operation analogous to the traditional                    
          understanding the artisan has of physical rename registers,                 
          the artisan would have clearly considered the teachings to be               
          analogous art within 35 U.S.C. § 103, appellants' arguments in              
          the brief and reply brief notwithstanding.  Additionally,                   
          because Kau teaches both his specific approach as well as the               
          recognition of the existence of prior art approaches utilizing              
          physical rename registers, when the teachings are properly                  

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