Appeal No. 1998-2661
Application 08/633,267
to the instructions as they enter this VAIW as expressed in
the discussion between columns 3 through 5 of Deosaran and
most succintly expressed at the bottom of column 3 at lines 59
through 62 "[e]ach instruction's tag remains constant as long
as the instruction remains in the window. This tag is also
associated with the location in a temp buffer (discussed
below) that the corresponding instruction's output will be
stored."
From an artisan's perspective, this temporary buffer is
clearly analogous to the claimed physical rename registers in
a manner well-expressed earlier in this opinion in terms of
their functionality. Thus, it is apparent that this temporary
buffer is reassigned according to the tagging scheme and
associated with an instruction before the availability of the
buffer to receive the result of that instruction in accordance
with that which is set forth in claim 1 on appeal. This pre-
assignment is necessary and indirectly expressed again at
column 5, lines 29 through 32 indicating "the processor
implementing the present invention uses the tag of an
instruction as the temp buffer address of that instruction's
result." Therefore, we only sustain the rejection of claim 1
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