Ex parte TOMINAGA et al. - Page 20




                 Appeal No. 2001,0712                                                                                                                  
                 Application 08/148,887                                                                                                                


                 not consider the effect that the operation associated with a                                                                          
                 given variable has on a register allocation.                                                                                          
                                   Furthermore, we find that the very different                                                                        
                 subjects of the Hitchcock and Chi articles indicate against                                                                           
                 one skilled in the art combining their teachings. Hitchcock                                                                           
                 teaches  a method of automatically synthesizing data paths18                                                                                                                       
                 from a behavioral description of a hardware design.  The EMUCS                                                                        
                 program implementing the method attempts to find a minimum                                                                            
                 cost implementation of a hardware design given a dataflow                                                                             
                 representation VT.  The program proceeds by binding abstract                                                                          
                 data flow elements onto hardware elements in iterative                                                                                
                 fashion. Once all the hardware elements have been bound, the                                                                          
                 program determines which implementation would result in the                                                                           
                 optimum design given the parameter which is to be optimized.                                                                          
                                   Chi teaches  a graph-based scheme for allocating19                                                                                              
                 variables to registers and memory, and this scheme is based on                                                                        
                 a machine state level model. This model is directed to                                                                                
                 optimizing register storage based on analyzing read and write                                                                         


                          18Page 484, column 1.                                                                                                        
                          19Page 286, column 1; page 270, columns 1-2 and table 2.                                                                     
                                                                          20                                                                           





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