Appeal No. 1998-0908
Application No. 08/506,292
of Tuckerman, in particular, the description at column 4, lines
35-46, reveals a disclosure of monitoring and limiting circuitry
as claimed. In our view, contrary to Appellants' arguments
(Brief, pages 27-28) the disclosed short prevention isolation
resistors 206-214 on the test substrate will serve to limit
current and voltage to the product wafer as broadly recited in
Appellants’ claims.
As to claims 66, 67, 73, 74, 81, and 82 directed to
communication of clock and reset signals to the product wafer, we
find the presently discussed obviousness rejection of the
Examiner to be similarly deficient to that discussed previously.
As with our earlier discussion, we find no disclosure in any of
the additional applied secondary references, and the Examiner has
pointed to none, of the clock and reset signals recited in claims
66, 67, 73, 74, 81, and 82 and the current flow and voltage level
limiting circuitry set forth in claims 69 and 70. Accordingly,
since all of the claim limitations are not taught or suggested by
the applied prior art references, the Examiner’s separate
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