Appeal No. 1998-2749
Application 08/637,062
This is a decision on appeal under 35 U.S.C. § 134 from the
final rejection of claims 12-24 and 26-31. Claim 25 has been
allowed.
We affirm-in-part.
BACKGROUND
The disclosed invention is directed to a network controller
which allows received data frames to be held in an internal memory
buffer and which has the capability to selectively switch between
a direct memory access (DMA) mode of data transfer and a non-DMA
mode of data transfer to move data frames from the internal memory
buffer to a desired location. When an overflow of the memory
buffer is anticipated, a DMA controller is automatically engaged
to move the data frames from the memory buffer to a system memory
to prevent the received frames from being discarded.
Claim 12 is reproduced below.
12. In a network controller for receiving data frames
having an internal memory buffer for holding the data frames
received from a network for processing by a host processor,
and a direct memory access (DMA) circuit transferring
received data frames into a system memory, a buffer manager
comprising:
a held frame monitor responsive to said memory buffer
for monitoring the data frames loaded into said memory buffer
and unloaded from said memory buffer, and
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