Appeal No. 99-0872
Application 08/885,399
a set of N data lines, where N is an
integer greater than 32; each of the N data
lines extending across the surface of the
first substrate; each of the N data lines
having a drive input lead in a multiplexer
region of the surface of the first
substrate; and
for each of the N data lines, M units of
cell circuitry, each connected for
receiving signals from the data line, where
M is an integer greater than zero;
multiplexer circuitry formed in the multiplexer
region of the surface of the first substrate; the
multiplexer circuitry being connected to the drive
input lead of each of the N data lines; the
multiplexer circuitry comprising:
for each of the N data lines, a drive
output lead connected for providing
multiplexed signals to the data line’s
drive input lead;
P analog input leads for receiving input analog
drive signals, where P is an integer less than N but
not less than 32; and
Q multiplexer control leads for receiving
multiplexer control signals, where Q is an
integar not less than N/P and less than N;
the multiplexer circuitry responding to the
input analog drive signals and the
multiplexer control signals by providing
the multiplexed signals; and
one or more integrated circuit structures attached
to the first substrate; the integrated circuit
structures together comprising:
3
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Last modified: November 3, 2007