Appeal No. 1999-0134
Application 08/590,695
The disclosed invention pertains to a method and
apparatus for functionally testing an integrated circuit chip
using test patterns derived from simulation tests performed on
a system model which includes the integrated circuit chip.
Representative claim 1 is reproduced as follows:
1. A computer-implemented method for functionally
testing an integrated circuit chip using test patterns derived
from simulation tests performed on a system model which
includes the integrated circuit chip, said method comprising:
(a) receiving a simulation model for an electronic
system and a simulation test for the simulation model;
(b) identifying a portion of the simulation model to be
individually tested;
(c) producing portion-specific simulation test data
based on at least the portion identified in (b) and the
simulation test; and
(d) deriving test patterns for testing the portion
identified in (b) using the portion-specific simulation test
data.
The examiner relies on the following references:
Aihara et al. (Aihara) 5,282,146 Jan. 25, 1994
Millman et al. (Millman) 5,390,193 Feb. 14, 1995
Mannle 5,390,194 Feb. 14, 1995
Fukui et al. (Fukui) 5,400,270 Mar. 21, 1995
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