Appeal No. 1999-0886
Application No. 08/722,738
an EPROM cell into a standard sub-micron CMOS process, difficult because of channel
lengths being less than a micron, may generate unwanted “hot” electrons in a CMOS
device which would require the CMOS device to include lightly doped “hot” electron
suppression regions to avoid high electric fields. However, such suppression of these
“hot” electrons is undesirable for the EPROM which requires “hot carrier” generation in the
channel region in order to program the EPROM.
Appellants’ solution to this dilemma is to provide an EPROM having a field effect
transistor (FET) connected to a capacitor. Relatively heavy doped regions are selectively
formed in the EPROM FET and are inhibited from being formed in the CMOS transistors.
These heavily doped regions dominate the EPROM FET lightly doped “hot” electron
suppression regions to enable programming of the EPROM. As summarized by
appellants in the brief, the device is a memory which has a charge storing capacitor
coupled to the gate electrode and adapted to store charge produced in the channel region
in response to a logic state programming voltage applied between one of the source and
drain regions and the gate electrode. In order to store
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