Appeal No. 1999-1630
Application No. 08/784,775
Appellant does not dispute the examiner’s characterization of APA and agrees that the difference
between the instant claimed invention and APA is in the former’s use of MOS transistors for APA’s
bipolar transistors Q2-Q3. It is appellant’s position, and the reason for the instant invention, that the
use of bipolar transistors Q2-Q3 suffer from the problem that the outputs of the amplitude amplification
section have to be sufficiently low in order to completely turn on one transistor of the P-channel MOS
transistors P1 and P2 of the input section of the level conversion section and completely turn off the
other transistor. Otherwise, either the level conversion section would be inoperable or the operating
speed would become slow. On the other hand, if the low level of the amplitude amplification section
output is set to a sufficiently low value such that its highest value is still low enough, there will be a
problem that the collector potentials of the NPN transistors Q2 and Q3, which constitute the current
switches of the amplitude amplification section, will be overreduced and the transistors will be saturated
and the operating speed will be reduced, when the low level of the output fluctuates conversely in the
lowest direction.
Appellant allegedly solves these problems by providing a pair of MOS transistors of a first channel
type (claim 1), and providing a pair of N-channel MOS transistors (claim 3).
While Nagasawa may show two MOS transistors as claimed, in order for a proper rejection under
35 U.S.C. 103 to lie, there must be some reason for the artisan to have modified APA by replacing the
two bipolar transistors with the MOS transistors of Nagasawa. The artisan must have been led to
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