Appeal No. 1999-1992
Application No. 08/848,842
in load. Conventionally, the DC-to-DC converters address this
situation by employing bulk capacitance. Unfortunately, the
use of bulk capacitance has several disadvantages. Therefore,
it would be desirable if a technique or a method were
available to reduce the amount of capacitance employed with a
DC-to-DC converter while still providing the capability of the
DC-to-DC converter to maintain the output voltage signal level
within the desired voltage signal window or voltage signal
level bounds, even when a sizable or significant load is
applied. One embodiment of the invention comprises a circuit
configuration to adjust the output voltage signal level of the
DC-to-DC converter as a function of the output current signal.
For this embodiment of a DC-to-DC converter, higher current
signal levels lower the output voltage signal level by a
proportional amount. This adjustment of output voltage signal
level provides increased voltage margin to respond to load
changes producing output current signal changes. In this way,
the circuitry of the invention effectively adjusts the set
point of the output voltage signal level in response to
voltage signal transients, such as from an increase in load.
The set point refers to a voltage signal level about which the
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