Appeal No. 1999-2398
Application No. 08/825,427
This theoretically allows instructions to be independent
of each other, but does not suggest different portions of
a single instruction can be executed independent of each
other as claimed.
While Matsuo discloses both an address
calculation unit and a data operation unit,
operations performed by the two units for a single
store instruction are not independent of each other
with respect to a single instruction. Further,
Matsuo does not teach or suggest creating a first
operation and a second operation in response to a
store (or any other type of) instruction. Matsuo
cannot teach or suggest independent execution of
operations based on a single store operation because
Matsuo teaches pipelined execution of each
instruction without decomposition of each
instruction.
We agree with appellants’ arguments. Thus, the
obviousness rejection of claims 1 through 5, 7 through 11, 131
1It appears that the broad limitations of claim 1, and
other claims on appeal, read on the admitted prior art
(specification, pages 1 and 2). For example, “[i]n the prior
art, a store operation included an address calculation and a
data calculation,” and “[t]hese two calculations are performed
by different hardware in the computer system and require
different resources.” The admitted prior art goes on to
explain that “the store operation is performed in response to
one instruction, or one part of an instruction, wherein the
data calculation is performed first and, once complete, the
address calculation occurs . . . . ” In other words, “the
time during which the first operation is executed is
independent of the time during which the second operation is
executed” as claimed. Thereafter, the calculated address and
the data are recombined and dispatched to memory as a single
operation.
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