Appeal No. 2000-0975
Application No. 08/956,402
Guttag’s Figure 4 would have suggested the main processor residing on a chip
separate from that of the parallel processors. Moreover, the recitation “wherein said
main processor is on a separate chip” does not appear to limit the process set forth in
base claim 1 in any meaningful way. We sustain the rejection of claim 7.
We do not sustain the rejections of claims 8 and 9. Unlike claim 2 (depending
from base claim 1), instant claim 8 is specific with respect to the tasks which are passed
to the parallel processors, and require that the parallel processors perform language
interpretation tasks. The examiner has not shown disclosure or suggestion of these
features of claim 8. Instant claim 9 recites, in somewhat broader language, “selecting a
subset of parallel processors on said single-chip multiprocessor and using said subset
to accelerate said language interpretation tasks for said current page.” We cannot
agree with the examiner’s indication that Gauthier at column 9, lines 13 to 20 teaches
selecting a subset of parallel processors and using the subset to accelerate language
interpretation tasks.
We sustain the rejections of claims 11 and 12. The claims require at least one
“dedicated” geometry processing (claim 11) or one “dedicated” rasterization parallel
processor (claim 12). Molnar reveals, in the discussion of the “sort-middle” scheme (pp.
24-25), that it was conventional to perform geometry processing and rasterization on
separate processors. The same section further teaches that such an architecture is
conducive to effecting a sort-middle system, and thus would have suggested at least
-6-
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