Ex parte SEGARS - Page 1




          The opinion in support of the decision being entered today was not written for
                   publication and is not binding precedent of the Board.             

                                                            Paper No. 22              


                      UNITED STATES PATENT AND TRADEMARK OFFICE                       
                                    _____________                                     
                         BEFORE THE BOARD OF PATENT APPEALS                           
                                  AND INTERFERENCES                                   
                                    _____________                                     
                              Ex parte SIMON A. SEGARS                                
                                    _____________                                     
                                Appeal No. 1999-0166                                  
                             Application No. 08/656,544                               
                                   ______________                                     
                                      ON BRIEF                                        
                                   _______________                                    
          Before RUGGIERO, BARRY, and LEVY, Administrative Patent                     
          Judges.                                                                     
          RUGGIERO, Administrative Patent Judge.                                      

                                 DECISION ON APPEAL                                   
               This is a decision on the appeal from the final rejection              
          of claims 1 and 3-9.  Claim 2 has been canceled.                            
               The disclosed invention relates to a data processing                   
          method and apparatus including an integrated circuit having a               
          processor core and a scan chain in which the processor core                 
          executes instructions using either a system clock signal or a               
          test clock signal.  Clock selecting circuitry selects the                   






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