Ex Parte GULICK - Page 1



               The opinion in support of the decision being entered                   
               today was not written for publication in a law journal                 
               and is not binding precedent of the Board.                             
                                                               Paper No. 22           

                      UNITED STATES PATENT AND TRADEMARK OFFICE                       
                                                                                     
                         BEFORE THE BOARD OF PATENT APPEALS                           
                                  AND INTERFERENCES                                   
                                                                                     
                               Ex parte DALE E. GULICK                                
                                                                                     
                                Appeal No. 2001-0594                                  
                             Application No. 08/929,153                               
                                                                                     
                                      ON BRIEF                                        
                                                                                     
          Before THOMAS, KRASS and GROSS, Administrative Patent Judges.               
          KRASS, Administrative Patent Judge.                                         

                                 DECISION ON APPEAL                                   

               This is a decision on appeal from the final rejection of               
          claims 1-19, 21-23, 25 and 26.                                              
               The invention is directed to power management in computer              
          systems.  More specifically, logic functions are partitioned                
          across two chips interconnected by a serial bus.  The bus is                
          placed in a power savings mode and is used to communicate the               
                                         -1–                                          




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