Appeal No. 2001-1419
Application No. 09/199,960
The disclosed invention relates to a process for
manufacturing a semiconductor structure in which a polysilicon
alignment structure is initially formed on a semiconductor
substrate. Lightly doped drain regions are thereafter formed in
the substrate structure and aligned with the alignment structure.
After nitride spacers are formed on the sides of the alignment
structure, source and drain regions are formed in the substrate
and are aligned with the alignment structure. An epitaxial layer
is grown on the substrate adjacent the spacers, and a trench is
formed between the spacers by removing the polysilicon alignment
structure. After a gate dielectric is formed in the trench and a
silicide layer is formed on the epitaxial layer, a metal gate
electrode is formed in the trench.
Claim 9 is illustrative of the invention and reads as
follows:
9. A process for making a semiconductor structure with
a silicon substrate, comprising:
forming a polysilicon alignment structure on the
substrate;
implanting into the substrate at a first energy level a
first concentration of a first dopant species, whereby
lightly doped drain regions are formed in the substrate and
aligned with the alignment structure;
forming nitride spacers on sides of the alignment
structure;
2
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