Ex Parte WHITMAN et al - Page 7




          Appeal No. 2001-1633                                                        
          Application 09/092,543                                                      


          actually made by appellants have been considered in this                    
          decision.  Arguments which appellants could have made but chose             
          not to make in the brief have not been considered and are deemed            
          to be waived by appellants [see 37 CFR § 1.192(a)].                         
          The rejection is explained by the examiner on pages 4-8 of                  
          the answer.  With respect to each of the rejected claims,                   
          appellants argue that the examiner has failed to establish a                
          prima facie case of obviousness.  Specifically, appellants argue            
          that there is no motivation within the applied prior art for                
          combining the teachings in the manner proposed by the examiner.             
          Appellants also argue that neither reference teaches controlling            
          the flow as recited in the claims.  Appellants point out that the           
          portions of Ushijima noted by the examiner fail to teach                    
          controlling the flow as claimed [supplemental brief, pages 4-8].            
          The examiner responds that Lin and Ushijima each teaches the step           
          of controlling the forming of a resist film on a silicon wafer.             
          The examiner indicates that it would have been obvious to control           
          the dispensers in Lin by monitoring film thickness at a location            
          on the surface of the wafer as taught by Ushijima [answer, pages            
          8-12].  Appellants respond that Ushijima does not teach                     
          controlling fluid flow based on the location of the fluid on the            
          surface of the wafer [reply brief, pages 1-2].                              


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