Appeal No. 2001-2089
Application 08/993,368
reliability of the semiconductor device and to decrease the
number of manufacturing steps” as suggested by Komori at column
2, lines 65-67 and column 3, lines 4-6.
Appellant’s arguments in response to the obviousness
rejection initially assert (Brief, pages 5-7; Reply Brief, pages
1-3) that a prima facie case of obviousness has not been
established since there is no suggestion or motivation in the
disclosures of the Momodomi and Komori references for the
Examiner’s proposed combination. In particular, Appellant
contends (Brief, pages 4-7; Reply Brief, pages 1-3) that Komori,
relied on by the Examiner as suggesting a select gate transistor
with the requisite claimed layer structure, in fact has no
teaching of select gate transistors.
After careful review of the applied Momodomi and Komori
references in light of the arguments of record, we are in general
agreement with Appellant’s position as stated in the Briefs.
While it is proper for an Examiner to consider, not only the
specific teachings of a reference, but inferences a skilled
artisan might draw from them, it is equally important that the
teachings of prior art references be considered in their
entirety. See In re Preda, 401 F.2d 825, 826, 159 USPQ 342, 344
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