Appeal No. 2001-2477
Application No. 09/099,384
Claims 1 and 12 are the only independent claims on appeal, and they read as follows:
1. A multiprocessor computer system, comprising:
a cache comprising a plurality of blocks, each block having a coherence state;
an external unit generating a request to modify one of the blocks of the cache, the request
being generated as a function of the coherence state of the block;
a memory management system managing said cache, wherein said memory management
system does not internally duplicate the coherence state of the cache;
wherein said memory management system receives the request to modify one of the blocks
and sends an acknowledgment to the external unit in response to the request to modify, the
acknowledgment being determined to be one of grant permission and denial of permission based on
a state of the cache; and
wherein the external unit modifies the block of the cache only if an acknowledgment
granting permission is received responsive to the request.
12. A method of maintaining cache coherence in a multiprocessor system having a plurality
of caches and a main memory, comprising the steps of:
sending a request to modify a block of a first cache of the plurality of caches, the request
corresponding to a coherence state of the block of the first cache;
determining if said block exists in a dirty form in any other of the plurality of caches by
directly probing those caches;
receiving an acknowledgment responsive to the request indicating one of a grant and denial
of permission to modify the block of the first cache based on said determination step; and
modifying the block of the first cache if the acknowledgment grants permission.
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