Appeal No. 2001-2540
Application No. 09/240,395
Representative independent claim 1 is reproduced as follows:
1. An integrated circuit comprising:
a substrate;
a gate dielectric disposed over the substrate;
and
a gate stack disposed on the gate dielectric, the gate stack
including;
a layer comprising silicon;
a transition metal boride layer disposed on the layer
comprising silicon; and
a conducitve layer disposed on the transition metal boride
layer.
The examiner relies on the following references:
Lur et al. [Lur] 5,364,803 Nov. 15, 1994
Thomas 5,414,301 May 09, 1995
Claims 1-21 stand rejected under 35 U.S.C. 103 as
unpatentable over Lur in view of Thomas.
Reference is made to the briefs and answer for the
respective positions of appellants and the examiner.
OPINION
The examiner relies on Figure 2 of Lur for the teaching of
an integrated circuit comprising a substrate 10, a gate
dielectric 12 disposed over the substrate and a gate stack
disposed on the gate dielectric 12, wherein the gate stack
2
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