Ex Parte CHU et al - Page 1




               The opinion in support of the decision being entered                   
               today was not written for publication in a law journal                 
               and is not binding precedent of the Board.                             
                                                               Paper No. 14           

                      UNITED STATES PATENT AND TRADEMARK OFFICE                       
                                                                                     
                         BEFORE THE BOARD OF PATENT APPEALS                           
                                  AND INTERFERENCES                                   
                                                                                     
                    Ex parte WEI-MUN CHU, SUDHAKAR R. GOURAVARAM                      
                                   and SON NGUYEN                                     
                                                                                     
                                Appeal No. 2002-0286                                  
                             Application No. 09/113,995                               
                                                                                     
                                      ON BRIEF                                        
                                                                                     
          Before KRASS, BARRETT and SAADAT, Administrative Patent Judges.             
          KRASS, Administrative Patent Judge.                                         


                                 DECISION ON APPEAL                                   
               This is a decision on appeal from the final rejection of               
          claims 1-30, all of the pending claims.                                     
               The invention is directed to integrated circuit design.  In            
          particular, in a technique for the placement and routing of                 
          circuits during an integrated circuit design, a single cell                 
          includes both a signal processing circuit and a buffer circuit              
          for buffering a signal external to the integrated circuit in                
          which the cell is included.  This is said to result in a                    

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