Appeal No. 2002-0286
Application No. 09/113,995
nothing more than a reference to various parts of the references,
with no explanation whatsoever as to how each and every claim
limitation is alleged to be met.
For example, at page 5 of the answer, with reference to Luk,
the examiner points to the abstract, Figures 2, 4A-4D and 6-14,
the summary of the invention, column 5, lines 29 et seq. and
column 7, lines 1-3, of Luk, offering portions relating to
synthesizing buffers, drivers and latches in accordance with
input requirements for the function of a chip, DSP, PLL,
decoupling, design, layout and optimization methodology.
However, there is absolutely no indication how any of this
relates to the claimed single cell including a signal processing
circuit, a buffer circuit for buffering a signal external to the
integrated circuit bearing the cell, and layout information.
Where, in Luk, or any of the other applied references, is the
examiner alleging a teaching of a buffer circuit for buffering a
signal external to the integrated circuit bearing the single
cell? The examiner does not expressly say.
Even in the examiner’s response, at pages 11 et seq. of the
answer, the examiner merely lists elements of claim 1 and alleges
that Luk teaches these limitations in Figure 9 and concluding
that “both Luk . . . and the instant claimed invention are the
same” (answer, page 14). But, again, no explicit indication is
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