Appeal No. 2002-0897
Application 09/303,020
Contrary to the appellants’ argument, Roy does not limit his
process to interlevel dielectric films but, rather, indicates
that the process is applicable to CMP of other films (col. 2,
lines 54-57). Hence, the appellants’ argument that Roy
“relate[s] particularly to planarization of interlevel dielectric
films” (reply brief, page 2) is not well taken.
As for the appellants’ argument that Roy’s process is
specifically directed toward preventing the CMP silica particles
from drying and thereby gelling and bonding to the surface of the
wafer, Roy teaches that the wafer surface is preferably kept wet
throughout the cleanup process to prevent such gelling and
bonding, but does not indicate that the disclosure is limited to
a process for preventing that gelling and bonding (col. 4,
lines 32-40).
The appellants argue that “there is no reasonable
expectation of success provided in the prior art (i.e., absent
the benefit of Appellant’s disclosure) that the addition of brush
scrubbing of Roy et al. to the process of Doan et al. would clean
an open portion of a cavity. Moreover, the teachings of both
Roy et al. and Doan et al. fail to support the Examiner’s
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