Appeal No. 2002-1415
Application No. 09/141,812
BACKGROUND
The invention is directed to a method of removing residues after etching a via
during fabrication of integrated circuits. Claim 8 is reproduced below.
8. A method of removing etch residue from a via after etching the via through
an insulating layer in a partially fabricated integrated circuit assembly, the
method comprising exposing the etch residue to a plasma formed from ammonia
and oxygen.
The examiner relies on the following references:
Chen et al. (Chen) 5,661,083 Aug. 26, 1997
Savas et al. (Savas) 5,811,022 Sep. 22, 1998
(filed Nov. 15, 1994)
Molloy et al. (Molloy) 5,849,639 Dec. 15, 1998
(filed Nov. 26, 1997)
Honda 5,977,041 Nov. 2, 1999
(filed Sep. 23, 1997)
Claims 1, 2, 4, 6, 8-12, 14, and 19 stand rejected under 35 U.S.C. § 103 as
being unpatentable over Molloy and Savas.
Claims 5 and 7 stand rejected under 35 U.S.C. § 103 as being unpatentable over
Molloy, Savas, and Honda.
Claims 16-18 stand rejected under 35 U.S.C. § 103 as being unpatentable over
Molloy and Chen.
Claims 20-28 were rejected under 35 U.S.C. § 103 over various combinations of
prior art in the Final Rejection. However, those rejections are not contested in this
appeal.
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