Appeal No. 2002-1885 Page 6
Application No. 08/966,453
examiner turns to the admitted prior art of figure 2 for a
teaching of a non-processing connector arrangement 16 which makes
a direct connection with the first bus system 14 for devices that
are off of the mother board without the connector arrangement
processing data passing therethrough. The examiner asserts (id.)
that it would have been obvious to replace the connector
arrangement 25, 30 of Suzuki with the non-processing connector 16
of the admitted prior art. The examiner's rationale (answer,
page 5) is that:
(1) a non-processing connector arrangement is cheaper
in cost than an image processor connector arrangement;
and, (2) a non-processing connector arrangement would
provide a faster or quicker data transmission since no
data processing or processing is performed.
With regard to claims 3, 6, and 8 the examiner takes Official
Notice that single in-line memory modules (SIMMs) are old and
well known, and asserts that it would have been obvious to use a
SIMM as the IC memory chip (claims 3 and 6) or board (claim 8) of
Suzuki.
Appellant agrees with the examiner (brief, page 14) that
connector 16 is a non-processing connector, but traverses the
examiner's rationale for combining the references. Appellant
asserts (brief, page 15) that replacing image processor 25 and
second bus 30 of figure 16 of Suzuki with the non-processing
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