Appeal No. 2002-2309
Application No. 09/099,386
have been obvious to one of ordinary skill in the art, having the
teachings of the Nishtala et al. before him at the time the
invention was made, to modify the cache coherency system
controller taught by the Nishtala et al., to incorporate the
snoop architecture or memory directory architecture for
maintaining cache coherency, as taught in the background of
Nishtala et al., to maintain coherency by use of a directory by
making cache state information available to the system processor
in a memory directory architecture, in order to provide for a
number of benefits, e.g., smaller chip size, as taught by
Nishtala et al.”
Appellants argue (brief, pages 19 and 20) that neither the
cache snoop architecture nor the memory directory architecture
teachings in the background of Nishtala mentions a memory
manager, that it is improper to modify Nishtala’s preferred
embodiment that uses duplicate cache tags with the background
teachings of this reference, and that the modified teachings of
the reference still neither would teach nor would have suggested
a memory manager that operates without duplicate cache tags.
We agree with appellants’ arguments. Nothing in the record
teaches or would have suggested the proposed modification of the
teachings of Nishtala. Even if the teachings of Nishtala were
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