Appeal No. 2003-0614
Application 09/520,591
devices at issue, and their manner of operation, indicates that
they are relatively simple and straightforward instruments. The
examiner has not established or cogently explained, and it is not
apparent, why the mere breadth with which these means and devices
are described would have prevented a person of ordinary skill in
the art from making and using the claimed invention without undue
experimentation.
Accordingly, we shall not sustain the standing 35 U.S.C.
§ 112, first paragraph, rejection of claims 1 through 26.
III. The 35 U.S.C. § 102(e) rejection of claims 1, 3, 16, 19 and
21 as being anticipated by Tigelaar
Tigelaar discloses “a method of testing semiconductor wafers
to locate problems resulting from the fabrication procedure”
(column 1, lines 9 through 11). The reference describes this
method, and the system for implementing it, as follows:
[r]eferring to the FIGURE, there is shown a host
computer 1 which controls the testing operation in
accordance with the present invention. Initially
semiconductor wafers are loaded into a cassette 3 in
standard manner for fabrication with the host computer
1 tracking the location 5 and rotational orientation 7
of each wafer initially placed within the cassette.
After one or more processing steps, as determined by
the host computer 1, the wafers are rearranged within
the cassette 3 by a robot or the like 5 as is known in
the art under control of the host computer with the
host computer tracking the new location of each wafer
within the cassette. Each wafer is also rotated within
the cassette 1 by a rotating tool 7 under control of
the host computer 1 after one or more processing steps,
5
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