Ex Parte Ruesch - Page 3



          Appeal No. 2003-1262                                                         
          Application No. 09/620,679                                                   

               Claims 7 and 23-25 stand rejected under 35 U.S.C. § 102(b)              
          as being anticipated by Knee.                                                
               Claims 8-10, 15 and 16 stand rejected under 35 U.S.C.                   
          § 102(e) as being anticipated by Esch.                                       
               We make reference to the answer (Paper No. 19, mailed                   
          November 26, 2002) for the Examiner’s reasoning and to the appeal            
          brief (Paper No. 18, filed September 25, 2002) and the reply                 
          brief (Paper No. 21, filed February 3, 2003) for Appellant’s                 
          arguments thereagainst.                                                      
                                       OPINION                                         
               With regard to the rejection of claims 7 and 23-25,                     
          Appellant’s main point of argument is that Knee does not disclose            
          a second supply voltage and “ground” cannot be properly                      
          interpreted as a supply voltage (brief, page 6).  During the oral            
          hearing, Appellant pointed to Figure 2A of the application and               
          argued that the second supply voltage corresponds to VTT 70 and,             
          therefore, is clearly distinct from ground levels 64.                        
               In response to Appellant’s arguments, the Examiner asserts              
          that zero volt at the ground is still a particular potential or a            
          supply voltage that is higher than a negative voltage (answer,               
          page 7).  The Examiner apparently relies on the prior art and                
          Appellant’s disclosure depicting a logic circuit connected                   
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