Appeal No. 2003-1690
Application 09/635,061
an island shape, and then, prior to depositing a conductive layer
and patterning the conductive layer to form a gate electrode,
depositing a second dielectric layer which covers the first
dielectric layer. Claim 24 is illustrative:
24. A process for manufacturing a thin film transistor
comprising the steps of:
depositing a semiconductor layer on a substrate by using a
plasma CVD method;
depositing a first gate dielectric layer consecutively to
the step of depositing said semiconductor layer by using the
plasma CVD method;
patterning said semiconductor layer together with said first
gate dielectric layer into an island shape;
depositing a second gate dielectric layer to cover said
first gate dielectric layer patterned into the island shape;
depositing a conductive layer over said second gate
dielectric layer; and
patterning said conductive layer to form a gate electrode.
THE REFERENCES
Ipri 4,758,529 Jul. 19, 1988
Lee et al. (Lee) 5,677,206 Oct. 14, 1997
(filed Feb. 26, 1996)
Nam et al. (Nam) 5,693,546 Dec. 2, 1997
(filed Jun. 6, 1996)
Makita et al. (Makita) 5,851,860 Dec. 22, 1998
(filed Jun. 2, 1995)
2
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