Appeal No. 2003-1690
Application 09/635,061
The examiner argues that “[i]t would have been obvious to
one of ordinary skill in the art at the time of the present
invention to use the 2nd gate dielectric layer of Ipri to cover
the 1st dielectric layer patterned into an island shape in the
process of Makita in order to form a thin-film transistor with
improved dielectric strength as is stated by Ipri in column 3,
lines 53-55)” (answer, page 5).
The improved dielectric strength in Ipri’s prior art
embodiment relied upon by the examiner is an improvement over the
low dielectric strength of a layer formed by thermal oxidation.
The improvement is obtained by depositing a silicon nitride layer
over the thermal oxidation layer. Makita’s device does not have
an oxide layer formed by thermal oxidation and, therefore, does
not have the low dielectric strength problem which Ipri’s prior
art relied upon by the examiner overcomes. Makita’s device has
only one gate dielectric layer, but it is a deposited layer like
the silicon nitride layer Ipri forms to increase the dielectric
strength.
The examiner argues as though Ipri would have indicated to
one of ordinary skill in the art that two deposited gate
dielectric layers are better than one. The examiner, however,
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