Appeal No. 2002-1994
Application No. 09/364,449
BACKGROUND
Appellants’ invention relates generally to an apparatus for
cache reads, and more specifically, to unaligned reads from a
cache having a fixed alignment of bytes on a fixed alignment
boundary. According to Appellants, to perform a read in which
the first data value does not correspond to the cache boundary,
an entire cache line is accessed (specification, page 2). Next,
the unused bytes, which remain after an unaligned double word
byte sequence is extracted are effectively thrown away (id.).
Representative claims 4, 6 and 17 are reproduced bellow:
4. An apparatus for cache read operations comprising:
a cache line having a plurality of storage units
wherein each storage unit is operable for storing a data
signal from a bus operable for communicating a plurality of
data signals, and wherein a first sequence of said
plurality of data signals is remapped into a second
sequence of data signals in said plurality of storage units
wherein said plurality of storage units further comprises a
plurality of groups of storage units, and wherein each
group of the plurality of groups is operable for reading a
data value from a corresponding storage unit in said group.
6. The apparatus of claim 5 wherein said circuitry
comprises:
a logic array operable for receiving an address and
outputting a signal operable for selecting said data value.
17. A method of unaligned cache read operations comprising
the steps of:
remapping a plurality of data signals for storage into
a cache line including a plurality of storage units;
2
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