Ex Parte FEGESH - Page 5



          Appeal No. 2002-2239                                                          
          Application No. 08/876,450                                                    
          processors.                                                                   
               To the extent the examiner regards anything connected to a               
          device's output as necessarily connected to the device's input                
          through the device itself, it is erroneous where, as here, the                
          connection is for the purpose of making it possible to provide                
          signals to the input of the device.                                           
               Similarly, for the purpose of providing a capability to                  
          switch or direct signals, the output of matrix switch 118 cannot              
          be deemed connected to the output of processors 111-117 simply                
          because the output of processors 111-117 are applied as inputs to             
          the matrix switch 118.  The examiner evidently has ignored the                
          requirement of "enabling free allocation of the picture signal-               
          processing devices to the at least one picture signal source and              
          to the outputs of the arrangement.                                            
               As a consequence, we determine that the examiner has not met             
          the burden of establishing a prima facie case of anticipation and             
          shall reverse this rejection.                                                 
               However, we observe in passing that it appears to us the Esch            
          description may nonetheless still render the claimed subject                  
          matter anticipated or obvious within the meaning of 35 U.S.C.                 
          §102(b) and 35 U.S.C. §103(a).  The communications processor 103              
          is connected to a multitude of signal sources (see, e.g. Esch,                
          Fig. 5, and column 7, lines 45-50).  The signal sources are                   
          capable of being switched from one processor to another (Fig 5,               
          reference numeral 105 can feed either video processor 111 or 112).            
          The communications processor 103 controls the control processor               
          109, which in turn controls the downstream matrix switch processor            
          117 and matrix switch 118.                                                    
               Thus, considering the communications processor, control                  
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