Appeal No. 2003-0008
Application No. 09/174,936
predicate of a predicated instruction in the decode stage of a
processor and the annulling of the predicated instruction in the
decode stage if the predicate has a particular value as claimed.
After reviewing the arguments of record from Appellants and
the Examiner, we are in general agreement with Appellants’
interpretation of the disclosures of Martell and Shiell as stated
in the Brief. As asserted by Appellants, any predicate
evaluation and instruction annulling performed in Martell takes
place after the decoding stage is complete for a particular
instruction. We agree with Appellants that this is confirmed by
the illustration in figure 10B of Martell along with the
accompanying description beginning at column 6, line 27.
Similarly, we agree with Appellants that, while Shiell
discloses the evaluation of predicates of a predicated
instruction and the suppressing or annulling of such instruction
dependent on a particular predicate value, such operations take
place after the decode stage. As illustrated in Figure 7 of
Shiell, and described beginning at column 10, line 34, the
predicate evaluation and instruction suppressing operations
illustrated in Shiell’s Figure 6 take place in blocks 42 and 44
external to the decode block 40 and subsequent to the operation
of the decode block 40.
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