Ex Parte CHEN et al - Page 1




            The opinion in support of the decision being entered today was not written
                   for publication and is not binding precedent of the Board.         

                                                                 Paper No. 21         

                       UNITED STATES PATENT AND TRADEMARK OFFICE                      
                                     ____________                                     
                          BEFORE THE BOARD OF PATENT APPEALS                          
                                   AND INTERFERENCES                                  
                                     ____________                                     
                             Ex parte SHIN CHUNG CHEN and                             
                                    FULVIO SPAGNA                                     
                                      ___________                                     
                                 Appeal No. 2003-1316                                 
                              Application No. 09/430,531                              
                                     ____________                                     
                                       ON BRIEF                                       
                                     ____________                                     
          Before HAIRSTON, RUGGIERO, and BLANKENSHIP, Administrative Patent           
          Judges.                                                                     
          HAIRSTON, Administrative Patent Judge.                                      



                                  DECISION ON APPEAL                                  
               This is an appeal from the final rejection of claims 1 through         
          20.                                                                         
               The disclosed invention relates to a delay locked loop circuit         
          that uses a control circuit to select one of a plurality of                 
          multiplexers to pass an input signal to its output, and to prevent          
          the input signal from passing to the outputs of the remaining               
          plurality of multiplexers.                                                  





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