Appeal No. 2003-1971
Application No. 09/489,970
structure of the invention after the removal of the unreacted
cobalt. See page 21 of Appellants' specification. Figure 11
shows a cross section of the gate structure after the removal of
the outer gate spacer layer 44. See pages 21 and 22 of
Appellants' specification.
Independent claim 1 is representative of Appellants' claimed
invention and is reproduced as follows:
1. A method for manufacturing salicided regions for electrical
contact to a semiconductor device, comprising the sequential
steps of:
providing a silicon semiconductor substrate whereby said
substrate has been provided with a semiconductor device whereby
said semiconductor device is a partially completed gate electrode
structure;
creating double layered gate spacers on the sidewalls of
said partially completed gate electrode structure said double
layered gate spacers containing an inner gate spacer comprising
oxide layer that is immediately adjacent to and overlying the
sidewalls of said partially completed gate electrode structure
and an outer gate spacer layer comprising silicon nitride that
overlays said inner layer thereby creating an intermediately
completed gate electrode structure;
performing source and drain implants into the surface of
said substrate whereby said source and drain implants are self-
aligned with said intermediately completed gate electrode
structure;
depositing a layer of cobalt over the surface of said
substrate thereby including the surface of said intermediately
completed gate electrode structure;
saliciding said layer of cobalt thereby creating reacted and
unreacted layers of cobalt on the surface of said substrate
33
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