Appeal No.2003-2001
Application No. 09/345,173
Chung (abstract and column 2, lines 43 and 44) is directed
to etching silicon materials and, in one embodiment, teaches
using an HF bath to remove thin oxide from a poly silicon surface
in an early stage of a silicon metal-oxide semiconductor (MOS)
device fabrication method that uses a PBL process (column 2,
lines 43 and 44 . Chung explains in the background section of
the patent (column 1, lines 28-41) that:
The PBL process is used at an early stage of
silicon device fabrication to form silicon oxide
regions which can act as isolation oxide. Briefly, the
PBL process proceeds as follows. After a thin oxide
layer is formed over a silicon substrate, a polysilicon
layer is deposited, followed by a silicon nitride
layer. The combined nitride and polysilicon layers,
sometimes referred to as a nitride/poly stack, are then
patterned using photolithography and etching
techniques which are well known in the semiconductor
industry. With the patterned nitride/poly stack acting
as a mask, oxidation is performed to produce field
oxide regions over the silicon substrate. This
nitride/poly stack generally needs to be removed prior
to subsequent processing.
Subsequent to the HF bath dip, silicon nitride material is
deposited over the polysilicon layer and the nitride and
polysilicon layers (the nitride/poly stack) are taught as being
patterned using known lithographic and etching methods. The
nitride/poly stack of Chung is used as a mask during an oxidation
-4-
Page: Previous 1 2 3 4 5 6 7 8 9 10 Next
Last modified: November 3, 2007