Appeal No. 2004-0660
Application No. 10/120,116
quoted point that the recitation in claims 4 and 10 is “broader
than referring to the wafer alone” (id.), this point relates to
breadth rather than to enablement vis-à-vis practicing the here
claimed invention by not applying an external RF bias to the wafer.
In light of the foregoing, we cannot sustain the Examiner’s
§ 112, first paragraph, rejection of claims 4 and 10.
Concerning the § 103 rejection of independent claims 1 and 8
(and of non argued dependent claims 2, 3, 6, and 9), the Examiner
correctly points out that Park discloses a method for filling
isolation trenches during semiconductor fabrication wherein
patentee “deposits a silicon-rich trench liner (114) of a thickness
between 30-[sic] and 200 angstroms” (answer, page 5; also see lines
32-43 in column 4 of Park). Patentee’s method also includes the
subsequent step of filling the isolation trench with an oxide
(e.g., see lines 53-65 in column 4). However, Park does not
identify the specific process by which this filling step is
achieved. As a consequence, the Appellants’ independent claims
distinguish over the Park reference by requiring that the filling
step be achieved via “a biased high density plasma deposition
process.”
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