Appeal No. 2004-1357 Application 09/587,281 DISCUSSION Nishida pertains to “a semiconductor wafer rear surface grinding method where a protecting tape is stuck on a semiconductor device forming surface of a semiconductor wafer and the rear surface is ground” (translation, page 1). Figures 2A and 2B illustrate a “conventional” process step wherein a protecting tape 5 which has been applied to one surface of a wafer 4 is cut along the periphery of the wafer by a cutter edge 2. Nishida teaches that “[t]he cutter edge 2 is inclined to the outside and touches the outer periphery of the wafer 4. If the protecting tape 5 is cut in this state, the protecting tape is cut at a position a little inside than the wafer peripheral edge” (translation, page 3, paragraph [0012]). In the same vein, Nishida states that “[a]s shown in Figure 2, when the protecting tape is cut by the conventional method, the protecting tape is cut at a position a little inside than the wafer peripheral edge. That is, the wafer peripheral edge protrudes form the peripheral edge of the protecting tape” (translation, pages 3 and 4, paragraph [0013]). Figure 2 shows that the wafer has a level upper surface and a chamfered peripheral edge, and that the 4Page: Previous 1 2 3 4 5 6 7 8 9 10 11 NextLast modified: November 3, 2007