Appeal No. 2005-2557 5
Application No. 09/204,585
examiner cites Luan as teaching that the programmable configuration of memory was
well known in the art. The examiner finds that it would have been obvious to the artisan
to incorporate a programmably configurable memory as taught by Luan into the device
of Yung [answer, pages 6-7]. With respect to dependent claims 8, 21 and 28, the
examiner finds that Yung teaches the claimed invention except that the global register
file of Yung is shown as a single piece whereas the claimed global register file is divided
into M pieces. The examiner finds that it would have been an obvious design choice to
use a single piece or M pieces for the global register file [answer, pages 8-10].
With respect to claims 1, 3-7, 9-14 and 23-27, which are argued together as a
single group, appellants argue that neither Yung nor Luan discloses or suggests register
file segments each coupled to, and associated with, a respective functional unit and
each implemented as an addressable array and partitionable into global and local
registers. Specifically, appellants argue that the global register file of Yung and a
separate local buffer do not together constitute a register file segment as claimed, nor
would such a segment be programmably configurable as claimed. Appellants also
argue that Luan’s programmable shared memory is not the same or interchangeable
with a register file segment that is implemented as an addressable array and that is
partitionable. Appellants assert that no interpretation of Luan supports an association
between any group of Luan’s memory banks and any particular functional unit of Yung’s
processor [brief, pages 8-11].
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