The opinion in support of the decision being entered today was not written
for publication and is not binding precedent of the Board.
UNITED STATES PATENT AND TRADEMARK OFFICE
__________
BEFORE THE BOARD OF PATENT APPEALS
AND INTERFERENCES
__________
Ex parte UDO WALTERSCHEIDT and
THOMAS E. WILLIS
__________
Appeal No. 2006-0537
Application No. 09/753,766
__________
ON BRIEF
__________
Before THOMAS, RUGGIERO, and BLANKENSHIP, Administrative Patent
Judges.
THOMAS, Administrative Patent Judge.
DECISION ON APPEAL
Appellants have appealed to the Board from the examiner’s final rejection of
claims 1 through 19.
Representative claim 1 is reproduced below:
1. A multi-threading processor, comprising:
a front end module;
an execution module coupled to said front end module;
a state module coupled to said front end module and said execution
module; and
a switch logic module coupled to said state module, wherein said switch
logic module detects a mispredicted branch in a software thread and
schedules a switch to another software thread during a latency of said
mispredicted branch.
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Last modified: November 3, 2007