Appeal No. 2006-0537 Page 4
Application No. 09/753,766
specifically recited in independent structure claim 1 on appeal. Appellants’
arguments appear to invite us to read all of the details shown in Figure 1 into the
subject matter of claim 1 on appeal. The claimed SoEMT processor of
specification Figure 1 appears to be substantially a prior art device as noted at
the top of the specification page 2. As well discussed by the examiner, the
claimed “coupled to” language in this claim does not require a direct connection
between the recited element “but only some type of connection so data can travel
from point A to point B” as discussed at the bottom of page 21 of the answer. In
terms of the “comprising” language utilized as the basis for the connective
between the preamble and the body of claim 1 on appeal, appellants rightly note
at the top of page 6 that this is open-ended claim language. The examiner
additionally correctly notes, however, that there “is no limitation in the word
‘coupled’ as to the number of elements the data can travel through before
reaching its destination as long as the data reaches its destination.”
We likewise disagree with appellants’ urging at the top of page 7 of the
brief that the thread switching logic 112 in Parady’s Figure 3 does not detect a
long-latency event. At a minimum, we consider that the artisan would have
considered this capability as a trigger event, therefore, as a kind of detection of
the event. Parady has consistently taught that the switching logic 112 functions
“in response to long-latency events” as expressed initially in the abstract of
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