Appeal No. 2006-1450 Application No. 09/933,786 We note that independent claim 1 reads in part as follows: “The shift post processor comprises a decoder to decode the offset parameter into the mask field, the mask field having a plurality of bits, each of the mask bits corresponding to a bit position of the shifted operand.” At page 11, paragraph 0054, Appellant’s specification states: The decoder 710 receives the OFFSET parameter and generates a shift field mask MASK [1 . . . N]. The shift field mask has N bits, mask(l) to mask (N), corresponding to N-bit word of the shifted operand. The shift mask field defines the bit positions that are affected by the post processing operations. In one embodiment, a logical one in the mask(k) indicates that the bit at the k-th position is affected by the post processing operation, and a logical zero allows the bit at the k-th position to pass through unmodified. The decoder essentially converts the OFFSET value into a bit pattern having a group of consecutive mask bits that corresponds to the portion of the operand to be operated upon. Thus, the claim does require that each of the masked bits corresponds to a bit position of the shifted operand. Now, the question before us is what Groves would have taught to one of ordinary skill in the art? To answer this question, we find the following facts: 1. Groves states, at column 1 lines 22-28, that: In modern data processing systems, this storage unit of data is termed a word and consist of 16 binary digits or bits. Words may also consist of 32, 48 or 64 bits 8Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NextLast modified: November 3, 2007